Classifier Instance:

Anchor text: Larrabee
Target Entity: Larrabee_\u0028microarchitecture\u0029
Preceding Context: As an example usage of DMA in a multiprocessor-system-on-chip, IBM/Sony/Toshiba's Cell processor incorporates a DMA engine for each of its 9 processing elements including one Power processor element (PPE) and eight synergistic processor elements (SPEs). Since the SPE's load/store instructions can read/write only its own local memory, an SPE entirely depends on DMAs to transfer data to and from the main memory and local memories of other SPEs. Thus the DMA acts as a primary means of data transfer among cores inside this CPU (in contrast to cache-coherent CMP architectures such as Intel's coming general-purpose GPU,
Succeeding Context: ).
Paragraph Title: Cell
Source Page: Direct memory access

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