Classifier Instance:

Anchor text: voltage follower
Target Entity: Common_collector
Preceding Context: When V 2 is "off", V 4 is "off" as well and V 3 operates in active region as a
Succeeding Context: producing high output voltage (logical "1"). When V 2 is "on", it activates V 4 , driving low voltage (logical "0") to the output. V 2 and V 4 collector–emitter junctions connect V 4 base–emitter junction in parallel to the series-connected V 3 base–emitter and V 5 anode–cathode junctions. V 3 base current is deprived; the transistor turns "off" and it does not impact on the output. In the middle of the transition, the resistor R 3 limits the current flowing directly through the series connected transistor V 3 , diode V 5 and transistor V 4 that are all conducting. It also limits the output current in the case of output logical "1" and short connection to the ground. The strength of the gate may be increased without proportionally affecting the power consumption by removing the pull-up and pull-down resistors from the output stage.
Paragraph Title: TTL with a "totem-pole" output stage
Source Page: Transistor–transistor logic

Ground Truth Types:

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Predicted Types:

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yagoGeoEntity-1.4020716424971884 0
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